A video game with no processor
Atari's Pong (1972) had no CPU and no software. The whole game was a board of a few dozen 7400-series TTL chips: counters, gates and flip-flops.
The same chips built minicomputers, cash registers and early medical monitors. Their voltage levels (0.8 V and 2.0 V) are still printed on Arduino and ESP32 datasheets as “TTL-compatible”.
Last week's DTL gate was slow when its output went from 0 to 1. Why? (Hint: what pulls the output up?)
Argue it in pairs for two minutes. There may be more than one defensible answer.
From DTL to TTL in two moves
The name: the input is a transistor (not a diode), and so is the output, hence Transistor–Transistor Logic.
Pin 14 = +5 V, pin 7 = ground: the corners, on every 14-pin 74-series chip. Each gate: Y = (AB)′.
Live lab: follow the current through a 7400 gate
| IR1 | 1.02 mA | out of the low input |
|---|---|---|
| IR2 | ≈ 0 | tiny: Q3 base |
| IB4 | 0 | Q4 off |
| ICC | 1.18 mA | P = 5.9 mW |
Worked example 1: an input LOW, the output HIGH
Given
Standard TTL NAND (7400): R1 = 4 kΩ, R2 = 1.6 kΩ, R3 = 1 kΩ, R4 = 130 Ω, VCC = 5 V. VBE(on) = 0.7 V, VCE(sat) = 0.2 V, VD = 0.7 V. Input A = 0.2 V, B = 3.6 V.
Find
VB1, the input current, the state of each transistor, VOH and the supply power.
Method: assume transistor states, compute, then check (Millman & Taub, Taub & Schilling TTL analysis)
Solution
Predict the answer first. Then reveal one step at a time.
Worked example 2: both inputs HIGH, the output LOW
Given
Same gate. A = B = 3.6 V.
Find
VB1, IB2, IR2, Q4's base current, VOL, the state of Q3, and the average power.
Method: reverse-active input transistor, saturated phase splitter (Mano, TTL circuit operation)
Solution
Predict the answer first. Then reveal one step at a time.
Critical thinking · what is the diode for?
A student redraws the 7400 output stage and leaves out the diode D “because it just wastes 0.7 V of the output swing”.
Using the node voltages from worked example 2, explain what goes wrong when the output is LOW. What does D cost us?
Work it out first.
Press Solve when the class has an answer.
Why the totem pole is fast
Driving 15 pF of load (a few inputs plus wiring) from 0.2 V up to the 2.0 V threshold:
| Pull-up | R (≈) | τ = RCL | Time to reach 2.0 V |
|---|---|---|---|
| DTL resistor | 2 kΩ | 30 ns | 14 ns |
| TTL totem pole | ≈ 100 Ω | 1.5 ns | 1.1 ns |
Q3 as an emitter follower has a low output resistance; with R4 it is around 100 Ω. Both edges are now driven by a transistor.
Your turn · 1: the 30 mA spike and the 100 nF capacitor
(a) Estimate the current spike through the totem pole while it switches.
(b) All four gates of a 7400 switch at once; the current rises in 3 ns and the supply wiring has 20 nH of inductance. How big is the dip on VCC?
(c) A 100 nF ceramic capacitor is placed across pins 14 and 7. Each spike lasts about 5 ns. Now how big is the dip?
Work it out first.
Press Solve when the class has an answer.
The datasheet view: levels, margins and fan-out
| 74 series (worst case) | Value |
|---|---|
| VOH(min) / VOL(max) | 2.4 V / 0.4 V |
| VIH(min) / VIL(max) | 2.0 V / 0.8 V |
| IOH / IOL (output can supply) | 0.4 mA / 16 mA |
| IIH / IIL (each input needs) | 40 µA / 1.6 mA |
Typical VTC from our model (switches near 1.3 V). The datasheet limits are guarantees for every chip, at any temperature: much stricter than one typical part.
Your turn · 2: mixing TTL subfamilies
74LS inputs need IIL = 0.4 mA and IIH = 20 µA; a 74LS output gives IOL = 8 mA and IOH = 0.4 mA. Standard 74 values are on the previous slide.
(a) How many 74LS inputs can one 7400 output drive? (b) How many standard 7400 inputs can one 74LS00 output drive? Say which state limits each answer.
Work it out first.
Press Solve when the class has an answer.
Schottky TTL: no more saturation
Last week: a saturated BJT stores extra charge in its base and needs a storage time ts to turn off. A Schottky diode (metal–semiconductor, ≈ 0.3–0.4 V) across base–collector diverts the excess base current once VCE drops to about 0.3–0.4 V. The transistor never saturates deeply: ts ≈ 0.
| Subfamily | Delay | Power / gate | Delay × power |
|---|---|---|---|
| 74 (standard) | 9 ns | 10 mW | 90 pJ |
| 74S (Schottky) | 3 ns | 20 mW | 60 pJ |
| 74LS (low-power Schottky) | 9.5 ns | 2 mW | 19 pJ |
| 74ALS (advanced LS) | 4 ns | 1.2 mW | 4.8 pJ |
74S kept small resistors and gained speed. 74LS used larger resistors (lower current, lower power) and spent the Schottky speed-up on getting back to standard speed: the same 9.5 ns at one fifth of the power.
Speed and power trade against each other. The fair comparison is their product, the speed–power product (delay × power, in pJ): the energy per switching event. Lower is better.
Live lab: the TTL family on one chart
74LS (low-power Schottky)
Schottky clamps with larger resistors: the workhorse of the 1980s.
Critical thinking · two outputs, one wire
To save a gate, a student connects the outputs of two 7400 gates to the same wire, hoping the wire will be HIGH only if both outputs are HIGH (an AND for free).
What happens when one output is HIGH and the other is LOW? Estimate the current. What should they use instead?
Work it out first.
Press Solve when the class has an answer.
Critical thinking · the floating input
A 7400 NAND is used as an inverter; its second input is left unconnected. The circuit works on the bench. Why does a floating TTL input act as HIGH, and why is it still a bad idea?
Argue it in pairs for two minutes. There may be more than one defensible answer.
Next class: a floating CMOS input is far worse. It has no defined level at all and can turn both transistors on at once.
Real world: “TTL serial”, 3.3 V and 5 V
The USB-to-“TTL” serial adapters you use to program an ESP32 or Arduino are named after these levels. Today's chips are CMOS, but they still quote TTL thresholds. Check every connection both ways:
| Driver → receiver | Check | Verdict |
|---|---|---|
| 3.3 V CMOS out → 5 V TTL-level in | VOH ≈ 3.2 V ≥ VIH = 2.0 V | OK |
| 5 V TTL out → 3.3 V chip in | VOH up to ≈ 3.6 V, input max ≈ 3.6 V | Risky |
| 5 V CMOS out → 3.3 V chip in | 5 V > the 3.6 V input limit | Damage: use a level shifter or divider |
A heart-rate or ECG sensor board running at 3.3 V talking to a 5 V microcontroller is a daily lab situation. The threshold arithmetic from today decides whether the data arrives, or the sensor dies.
Design a resistor divider so a 5 V output can drive a 3.3 V input safely.
Work it out first.
Press Solve when the class has an answer.
Pop quiz
Question 1 / 5
A 7400 input is held LOW by another gate. The current in R1…
Three things to remember
Input LOW: VB1 = 0.9 V, ≈ 1 mA flows out of the input; Q2, Q4 off; Q3 + D give VOH ≈ 3.6 V. Inputs HIGH: VB1 = 2.1 V, Q2 and Q4 saturate, VOL = 0.2 V.
Totem pole: fast edges both ways, D keeps Q3 off, R4 limits the ≈ 30 mA switching spike (decouple every chip with 100 nF). Never tie totem-pole outputs.
Datasheet: NM = 0.4 V, fan-out = min(IOL/IIL, IOH/IIH) = 10. Schottky clamps (74S, 74LS) remove storage time.
One 7400 output drives 3 standard TTL inputs and 4 74LS inputs. Check the LOW and HIGH states. How many more 74LS inputs could it drive?
Assignment 1 is published today (logic families), due Week 5, Class 1.
Work it out first.
Press Solve when the class has an answer.