Digital Electronics & Pulse Technique

Assessmentsplanned weeks, may change

Weeks

1. Week01

   Basic logic gates

   Class 1 · SaturdayDiodes as gatekeepers: diode logic (DRL)→Class 2 · SundayAdding a transistor: RTL to DTL→
2. Week02

   Transistors as switches

   Class 1 · SaturdayThe BJT switch: load lines and switching times→Class 2 · SundayMOSFET switches and MOS gates→
3. Week03

   Logic families

   🔒Assignment 1 published →
   Class 1 · SaturdayTTL: inside the 7400→Class 2 · SundayECL, I²L and CMOS→
4. This week04

   Logic design I

   Class 1 · SaturdayLatches: circuits that remember→Class 2 · SundayFlip-flops: edge-triggered memory→
5. Week05

   Logic design II

   Class test 1
   Class 1 · coming soonCounters and registersClass 2 · coming soonMemory systems and PLAs
6. Week06

   Delay, noise, open collector

   Class 1 · coming soonPropagation delay and noise immunityClass 2 · coming soonOpen-collector and tri-state gates
7. Midterm exam
8. Week07

   Converters and multivibrators

   Class 1 · coming soonD/A and A/D convertersClass 2 · coming soonMultivibrators and the 555
9. Week08

   Op-amps

   Class 1 · coming soonLinear op-amp circuitsClass 2 · coming soonNonlinear op-amp circuits and analog switches
10. Week09

    Pulse transformers

    Assignment 2 published
    Class 1 · coming soonPulse transformersClass 2 · coming soonPulse transmission and generation
11. Week10

    Clipping, clamping, comparators

    Class test 2
    Class 1 · coming soonClippers and clampersClass 2 · coming soonComparators and switching circuits
12. Week11

    Linear wave shaping

    Class 1 · coming soonRC high-pass and low-pass responsesClass 2 · coming soonIntegrators, differentiators and probe compensation
13. Week12

    Schmitt trigger and time-base

    Class 1 · coming soonThe Schmitt triggerClass 2 · coming soonBlocking oscillators and sweep circuits
14. Final exam